A HIGH-SPEED TRANSPUTER-BASED DATA-ACQUISITION SYSTEM

A 250 MHz 8-bit transputer-based data acquisition VME bus module is de scribed. This module has been designed as the acquisition node of a tr ansputer-based real-time processing and data reduction system for the reflectometry diagnostic in the ASDEX Upgrade tokamak experiment. The architecture of the board is detailed, emphasizing the advantages of u sing recently delivered devices, like fast synchronous FIFOs, in a mix ed ECL/TTL data acquisition architecture. It is shown that the impleme nted architecture leads naturally to the implementation of hardware tr iggers that allow the acquisition channels to operate as stand-alone m odules in a self-triggered, self-timed, data acquisition mode. The adv antages of using transputers as local control and processing units are discussed. The use of the board in the reflectometry diagnostic and t he general processing goals of the system are presented together with data characterizing the performance of the acquisition channels.