POWER ANALYSIS AND LOW-POWER SCHEDULING TECHNIQUES FOR EMBEDDED DSP SOFTWARE

Citation
Mtc. Lee et al., POWER ANALYSIS AND LOW-POWER SCHEDULING TECHNIQUES FOR EMBEDDED DSP SOFTWARE, Fujitsu Scientific and Technical Journal, 31(2), 1995, pp. 215-229
Citations number
11
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00162523
Volume
31
Issue
2
Year of publication
1995
Pages
215 - 229
Database
ISI
SICI code
0016-2523(1995)31:2<215:PAALST>2.0.ZU;2-5
Abstract
Embedded DSP applications can be characterized by the presence of a de dicated DSP processor and application specific software that runs on i t. Power is becoming a critical constraint for designing such applicat ions. Current power analysis techniques based on circuit-level or arch itectural-level simulation, however, are either impractical or inaccur ate to estimate the power cost for a given piece of application softwa re. In this paper, an instruction-level power analysis model is develo ped for an embedded DSP processor that is based on physical current me asurements. Significant points of difference have been observed betwee n the software power model for this custom DSP processor and the power models that have been developed earlier for some general purpose comm ercial microprocessors.(1),2)) In particular, the effect of circuit st ate on the power cost of an instruction stream is more marked in the c ase of this DSP processor. In addition, the DSP processor has a specia l architectural feature that allows instructions to be packed into pai rs. The energy reduction possible through the use of this feature is s tudied. The on-chip Booth multiplier on the processor is a major sourc e of energy consumption for DSP programs. A micro-architectural power model for the multiplier is developed and analyzed for further power m inimizations. In order to exploit all these effects, a scheduling tech nique based on the new instruction-level power model is then proposed to reduce the energy consumed by DSP software. Several example program s are provided to illustrate the effectiveness of this approach. Energ y reductions varying from 11% to 56% have been observed. These energy savings are real and have been verified through physical measurement. It should be noted that the energy reduction essentially comes for fre e. It is obtained through software modification, and thus, entails no hardware overhead. In addition, there is no loss of performance since the running times of the modified programs either improve or remain un changed.