A MONOLITHIC DC TEMPERATURE COMPENSATION BIAS SCHEME FOR MULTISTAGE HEMT INTEGRATED-CIRCUITS

This work benchmarks the first demonstration of a multistage monolithi c HEMT IC design which incorporates a de temperature compensated curre nt-mirror bias scheme, This is believed to be the first demonstrated m onolithic HEMT bias scheme of its kind, The active bias approach has b een applied to a 2-18 GHz five-section low noise HEMT distributed ampl ifier which achieves a nominal gain of 12.5 dB and a noise figure <2.5 dB across a 2-18 GHz band, The regulated current-mirror scheme achiev es better than 0.2% current regulation over a 0-125 degrees C temperat ure range, The RF gain response was also measured over the same temper ature range and showed less than 0.75 dB gain degradation, This result s in a -0.006 dB/degrees C temperature coefficient which is strictly d ue to HEMT device G(m) variation with temperature. The regulated curre nt-mirror circuit can be employed as a stand-alone V-gs-voltage refere nce circuit which can be monolithically applied to the gate bias termi nal of existing HEMT IC's for providing temperature compensated perfor mance, This monolithic bias approach provides a practical solution to de bias regulation and temperature compensation for HEMT MMIC's which can improve the performance, reliability, and cost of integrated micro wave assemblies (IMA's) used in space-flight military applications.