A 1.9 GHZ LOW-VOLTAGE SILICON BIPOLAR RECEIVER FRONT-END FOR WIRELESSPERSONAL COMMUNICATIONS-SYSTEMS

A 1.9 GHz wireless receiver front-end (low-noise preamplifier and mixe r) is described that incorporates monolithic microstrip transformers f or significant improvements in performance compared to silicon broadba nd designs, Reactive feedback and coupling elements are used in place of resistors to lower the front-end noise figure through the reduction of resistor thermal noise, and this also allows both circuits to oper ate at supply voltages below 2 V, These circuits have been fabricated in a production 0.8 mu m BiCMOS process that has a peak npn transistor transit frequency (f(T)) of 11 GHz. At a supply voltage of 1.9 V, the measured mixer input third-order intercept point is +2.3 dBm with a 1 0.9 dB single-sideband noise figure, Power dissipated by the mixer is less than 5 mW, The low-noise amplifier input intercept is -3 dBm with a 2.8 dB noise figure and 9.5 dB gain, Power dissipation of the pream plifier is less than 4 mW, again from a 1.9 V supply.