A 10 MB FRAME BUFFER MEMORY WITH Z-COMPARE AND A-BLEND UNITS

Citation
K. Inoue et al., A 10 MB FRAME BUFFER MEMORY WITH Z-COMPARE AND A-BLEND UNITS, IEEE journal of solid-state circuits, 30(12), 1995, pp. 1563-1568
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
30
Issue
12
Year of publication
1995
Pages
1563 - 1568
Database
ISI
SICI code
0018-9200(1995)30:12<1563:A1MFBM>2.0.ZU;2-E
Abstract
A 3-D frame buffer memory that integrates Z-compare and A-blend units onto a 10 Mb DRAM chip is presented. High I/O bandwidth and a new pixe l ALU implementation greatly improve rendering performance, The 3-D-RA M converts the fundamental rendering operation from read-modify-write into mostly-write. A triple-ported SRAM cache operating at a frequency of 100 MHz and an internal 256-b wide bus accelerate rendering operat ions to 400 Mpixel/s, ten times faster than conventional DRAM or VRAM, A VIDEO port is provided for CRT refresh with less than 2% area penal ty by virtue of a rectangular shaped page, A quad-polysilicon, double metal, 0.5 mu m CMOS process is employed.