STRUCTURED TEST METHODOLOGIES AND TEST ECONOMICS FOR MULTICHIP MODULES

Authors
KORNEGAY KT ROY K
Citation
Kt. Kornegay et K. Roy, STRUCTURED TEST METHODOLOGIES AND TEST ECONOMICS FOR MULTICHIP MODULES, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 19(1), 1996, pp. 195-202
Citations number
27
Categorie Soggetti
Engineering, Eletrical & Electronic","Engineering, Manufacturing","Material Science
Journal title
IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging → ACNP
ISSN journal
10709894
Volume
19
Issue
1
Year of publication
1996
Pages
195 - 202
Database
ISI
SICI code
1070-9894(1996)19:1<195:STMATE>2.0.ZU;2-M
Abstract
Multichip modules (MCM's) use complex digital, analog, and mixed-signa l Chips on a single substrate from different vendors. To ensure qualit y of die and the functionality and performance of MCM's, extensive tes ting is required at all levels. This paper presents structured test me thodologies for MCM's. The economics associated with these methodologi es and their relative cost at the MCM level are also presented.