COMPARISON OF HIGH-TEMPERATURE ANNEALED CZOCHRALSKI SILICON-WAFERS AND EPITAXIAL WAFERS

High temperature annealing of Czochralski Si wafers in Ar or hydrogen ambients reduces as-grown crystal defects close to the surface of Si w afers. This results in improved electrical properties and an oxygen de nuded zone. The depth profile of the defect density and the defect siz e distribution is investigated by removing successive Si layers by pol ishing and analyzing crystal originated particles. The efficiency of d issolving crystal defects by annealing was found to depend significant ly on the size distribution of the defects of the as-grown Czochralski Si wafers. The results are compared with the characteristics of epita xial grown Si wafers. The distinctly lower defect level of epitaxial w afers is responsible for their superior performance in device processe s.