K. Kotani et al., IMPACT OF HIGH-PRECISION PROCESSING ON THE FUNCTIONAL ENHANCEMENT OF NEURON-MOS INTEGRATED-CIRCUITS, IEICE transactions on electronics, E79C(3), 1996, pp. 407-414
In order to reduce the ever increasing cost for ULSI manufacturing due
to the complexity of integrated circuits, dramatic simplification in
the logic LSI architecture as well as the very flexible circuit config
uration have been achieved using a high-functionality device neuron-MO
SFET (nu MOS). In nu MOS logic circuits, however, computations based o
n the multiple-valued logic is the key for enhancing the functionality
. Therefore, much higher accuracy of processing is required. After bri
ef description of the operational principle of nu MOS logic, the relat
ionship between the number of multiple logic levels and the functional
ity enhancement is discussed for further enhancing the functionality o
f nu MOS logic circuits by increasing the number of multiple logic lev
els, and the accuracy requirements for the manufacturing processes are
studied. The order of a few percent accuracy is required for all prin
cipal device structural parameters when it is aimed to handle 50-level
multiple-valued variable in the nu MOS logic circuit.