IMPACT OF MU-A-ON-CURRENT GATE-ALL-AROUND TFT (GAT) FOR STATIC RAM OF16MB AND BEYOND

The gate-all-around thin-film transistor (TFT) (GAT) with thin channel poly-Si can suppress the individual performance variation induced by a poly-Si grain boundary in the channel, in addition to improving the average performance compared to the conventional single-gate TFT (SGT) . This effect is attributed to the thinning of the effective channel p oly-Si by hall in the GAT. Poly-Si TFT simulation results clearly conf irmed this effect in terms of the current(I)-voltage(V) characteristic s and channel potential. The GAT also reduces the threshold voltage in stability under negative bias temperature (-BT) stress because the GAT structure relaxes the stress electric field in the gate oxide. The hi gh-performance GAT enables reduction of the size of the static random access memory (SRAM) cell by providing a large ON-current to the stora ge node and enhancing the data retention stability despite the low cel l ratio. The GAT-SRAM cell is a strong candidate for SRAM of 16 ML and beyond.