COMPLEMENTARY DIGITAL LOGIC USING RESISTIVELY COUPLED SINGLE-ELECTRONTRANSISTOR

A new complementary digital logic based on resistively coupled single- electron transistors (R-SET) was proposed and its basic characteristic s were numerically analyzed using the Monte Carlo method. The proposed logic has a logic threshold independent of background polarization ch arges which induce crucial problems in logic operation in the case of a capacitively coupled logic. In addition, the proposed complementary R-SET logic has larger output voltage swing and better logic level sta bility than those of a conventional resistance-load R-SET logic. The s tability of the logic level of the complementary R-SET logic was inves tigated by calculating the data retention time of Bip-flop circuits, a nd its dependence on temperature and shot noise was examined. For stab le operation of the flip-flop circuit, estimated optimal operation tem perature and switching delay time are e(2)/80C(t)k(B) and 1500 R(t)C(t ), respectively, where C-t and R(t) are capacitance and resistance of the tunnel junction.