THERMAL BUDGET FOR FABRICATING A DUAL-GATE DEEP-SUBMICRON CMOS WITH THIN PURE GATE OXIDE

We studied the diffusion of impurities in dual polysilicon gates, and found that this phenomenon can effectively be treated as diffusion fro m a constant concentration diffusion source for both p(+) and n(+) pol ysilicon gates. We derived a model for the critical time required to o btain a flat profile. We then clarified the thermal budget required fo r suppressing gate depletion and impurity penetration through a gate o xide. According to our study, the thermal budget for n-type metal-oxid e-semiconductor-field-effect-transistor (MOSFET) is always wider than that for p-type MOSFET, and the budget for p-type MOSFET is wide enoug h for realizing a flat profile without impurity penetration using pure SiO2 if B is available instead of BF2.