We present a heuristic for lot sizing in serial assembly systems with
multiple constrained resources. This procedure, the Coefficient Modifi
cation Heuristic (CMH), exploits a special problem structure by solvin
g repetitively a small linear programming restriction of the original
problem. The key idea is to modify the constraint coefficients of cert
ain variables in the LP restriction to implicitly account for the capa
city consumed in setups. We compare the performance of the CMH with th
e commercial code, Optimization System Library (OSL), on three familie
s of test problems. The first set is a collection of small-scale rando
m problems that are solved to optimality to provide known benchmarks.
The second is a set of problems based on a real printed circuit board
manufacturing situation. The third group is a set of medium-scale rand
omly generated problems based on the underlying structure of the print
ed circuit board set. Overall, the CMH found solutions that averaged 1
8% better than time constrained OSL runs in a small fraction of the co
rresponding CPU times.