FABRICATION TECHNOLOGY FOR A HIGH-DENSITY JOSEPHSON LSI USING AN ELECTRON-CYCLOTRON-RESONANCE ETCHING TECHNIQUE AND A BIAS-SPUTTERING PLANARIZATION

To realize future high-density Josephson LSIs, an increase of the thic kness of a junction counter electrode and planarization of an insulati on layer are required. Using an improved electron cyclotron resonance plasma source, the counter electrode thickness can be increased to 300 nm with good junction quality and uniformity. With this method, a 0.4 mu m wide Nb line was also obtained. A bias-sputtering technique is s tudied as a planarization method. By the improved bias-sputtering plan arization technique, the planarization ratio of 23% is obtained indepe ndent of the underlying line width. These results are promising for fu ture high-density Josephson LSI fabrication.