2-DIMENSIONAL SWITCHED-CAPACITOR DECIMATING FILTERS

Traditional two-dimensional (2-D) switched-capacitor filters require v ery large line-memories mainly because of the oversampled characterist ic of the signal, both at the input and at the output, By bringing the output sampling rate closer to the Nyquist signal bandwidth it is pos sible to reduce considerably the line-memory requirements, and thus sa ving silicon area for cheaper integrated circuit implementation, Besid es, lower output sampling rates also contribute for ease of signal dig itization and processing and economy of signal transmission, Such oper ation of reducing the sampling rate from the input to the output can b e achieved using appropriate 2-D decimating filters which, besides the required baseband filtering, should also provide the necessary antial iasing filtering, This paper describes new switched-capacitor networks and design techniques that can efficiently implement such 2-D decimat ing filtering functions, both with finite impulse response and infinit e impulse response with separable denominator. They are based on exten sions of conventional multirate switched-capacitor polyphase networks and offer simple, systematic synthesis procedures which significantly extend the currently available design techniques for 2-D analog filter s.