A 1.3 V SUPPLY VOLTAGE ALGAAS INGAAS HJFET SCFL D-FF OPERATING AT UP TO 10 GBPS/

A high speed and low power consumption SCFL circuit design with low su pply voltage is proposed. Focusing on the relationship between logic s wing and supply voltage, the lower limit for the supply voltage is pre sented. Theoretical analysis and circuit simulation indicates that the logic swing needs to be optimized to maintain high average g(m) withi n the swing. An SCFL D-FF fabricated using a 0.25 mu m n-AlGaAs/i-InGa As HJFET process operates at up to 10 Gbps with power consumption as l ow as 19 mW at a supply voltage of 1.3 V.