ARCHITECTURE AND PERFORMANCE OF NONBLOCKING ATM SWITCHES WITH SHARED INTERNAL QUEUING

The paper studies the class of non-blocking multistage interconnection networks for ATM switching architectures in which the packet storage capability is obtained through a shared queueing technique. The basic components of this architecture are a sorting network and a routing ne twork; a recirculation network is also provided that accomplishes the packet shared queueing. The issues of congestion control and fairness in bandwidth allocation by this network are here investigated. We poin t out that the key component to be designed in order to fulfill the co ngestion control and fairness requirements is the selection algorithm of the packets that cannot be stored in the shared queue. Three classe s of selection algorithms are proposed and compared in terms of possib le hardware implementation and traffic performance.