Due to their limited sensitive volumes for charge collection, silicon
on insulator (SOI) technologies are good candidates for any microelect
ronic device operating in a space environment. While being insensitive
to latchup phenomena, SOI devices may experience single-event effects
(SEE's). Based on the analysis of the various structures of SOI trans
istors, charge collection mechanisms are presented. The different mode
ls proposed to analyze the sensitivity of CMOS SRAM cells are then dis
cussed. The available data of SEU characterizations are finally compil
ed.