R. Harjani et Jf. Shao, FEASIBILITY AND PERFORMANCE REGION MODELING OF ANALOG AND DIGITAL CIRCUITS, Analog integrated circuits and signal processing, 10(1-2), 1996, pp. 23-43
Hierarchy plays a significant role in the design of digital and analog
circuits. At each level of the hierarchy it becomes essential to eval
uate if a sub-block design is feasible and if so which design style is
the best candidate for the particular problem. This paper proposes a
general methodology for evaluating the feasibility and the performance
of sub-blocks at all levels of the hierarchy. A vertical binary searc
h technique is used to generate the feasibility macromodel and a layer
ed volume-slicing methodology with radial basis functions is used to g
enerate the performance macromodel. Macromodels have been developed an
d verified for both analog and digital blocks. Analog macromodels have
been developed at three different levels of hierarchy (current mirror
, opamp, and A/D converter). The impact of different fabrication proce
sses on the performance of analog circuits have also been explored. Th
ough the modeling technique has been fine tuned to handle analog circu
its the approach is general and is applicable to both analog and digit
al circuits. This feature makes it particularly suitable for mixed-sig
nal designs.