THE DESIGN OF LOW JITTER HARD LIMITERS

Authors
Citation
O. Collins, THE DESIGN OF LOW JITTER HARD LIMITERS, IEEE transactions on communications, 44(5), 1996, pp. 601-608
Citations number
10
Categorie Soggetti
Telecommunications,"Engineering, Eletrical & Electronic
ISSN journal
00906778
Volume
44
Issue
5
Year of publication
1996
Pages
601 - 608
Database
ISI
SICI code
0090-6778(1996)44:5<601:TDOLJH>2.0.ZU;2-R
Abstract
Hard limiters, which are nearly identical to level crossing detectors or zero crossing detectors, are an integral part of many communication s systems, of devices for characterizing precision oscillators, and of analog-to-digital converters, The purpose of a hard limiter is to div ide the continuous range of an analog input signal into two regions an d to provide a digital output indicating the region in which the signa l is, This digital output must, by definition, have an extremely short transition time, A hard limiter is thus a slope amplifier, since a sl owly varying input must produce a very rapidly varying output, Noise i n the amplifiers causes the output transition to be jarred from its co rrect position producing jitter in the output, This paper presents the analysis and details the design of very low jitter hard limiters, The ir immediate application is to the measurement of high stability signa l sources and to deep space communication and ranging; the results, ho wever, are easily adapted to many other purposes such as wave form dig itization, One of the devices described has been built, Its performanc e agrees closely with theory and is vastly superior to that of convent ional instrumentation.