A 2ND-ORDER DOUBLE-SAMPLED DELTA-SIGMA MODULATOR USING ADDITIVE-ERRORSWITCHING

Authors
BURMAS TV DYER KC HURST PJ LEWIS SH
Citation
Tv. Burmas et al., A 2ND-ORDER DOUBLE-SAMPLED DELTA-SIGMA MODULATOR USING ADDITIVE-ERRORSWITCHING, IEEE journal of solid-state circuits, 31(3), 1996, pp. 284-293
Citations number
22
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
31
Issue
3
Year of publication
1996
Pages
284 - 293
Database
ISI
SICI code
0018-9200(1996)31:3<284:A2DDMU>2.0.ZU;2-T
Abstract
A second-order double-sampled delta-sigma modulator is described, It u ses an additive-error switching scheme to convert capacitor mismatch i nto an additive out-of-band tone that can be removed by a digital filt er, With a sampling rate of 5 MHz and an oversampling ratio of 256, th e maximum measured signal-to noise-and-distortion ratio (SNDR) is 86.3 dB, and the total harmonic distortion is -88.7 dB when the input is 2 dB below full scale, The modulator is fully differential, occupies 5 mm(2), and dissipates 13 mW.