NOISE COMPUTATION IN SINGLE-CHIP PACKAGES

Authors
BATHEY K SWAMINATHAN M SMITH LD COCKERILL TJ
Citation
K. Bathey et al., NOISE COMPUTATION IN SINGLE-CHIP PACKAGES, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 19(2), 1996, pp. 350-360
Citations number
15
Categorie Soggetti
Engineering, Eletrical & Electronic","Engineering, Manufacturing","Material Science
Journal title
IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging → ACNP
ISSN journal
10709894
Volume
19
Issue
2
Year of publication
1996
Pages
350 - 360
Database
ISI
SICI code
1070-9894(1996)19:2<350:NCISP>2.0.ZU;2-M
Abstract
This paper describes the computation of noise in single chip packages forming an integral part of a larger system, An analysis tool is discu ssed that integrates the details of chip, first level, and second leve l packages to form a network for simulation, The tool is useful in the computation of noise generated by single chip packages and allows for post-layout, pre-fabrication noise estimation, This paper provides de tails on the components of noise including resonance which is often ov er looked in most computations. Time domain measurements have been use d to validate the noise analysis.