PACKAGED 30 GBIT S DATA DEMULTIPLEXING AND CLOCK EXTRACTION IC FABRICATED IN A ALGAAS/GAAS HBT TECHNOLOGY/

The authors have fabricated a research prototype 30 Gbit/s data demult iplexing and clock extraction IC for high speed multigigabit per secon d optical communication Systems. The circuit features a two stage on c hip front end limiting amplifier, as well as a master-slave decision c ircuit, differentiate and rectify circuitry for clock recovery, and a two stage limiting amplifier on the clock input to the decision circui t. The IC was packaged in a hybrid circuit module, and was used in lig htwave system experiments that included full PLL timing recovery.