DESIGN FOR TESTABILITY AND DC TEST OF SWITCHED-CAPACITOR CIRCUITS

The authors present a design for testability (DFT) technique for switc hed-capacitor circuits. The principle is to reconfigure the SC circuit so that it realises a cascade of DC voltage amplifiers in which all c apacitors are represented in a simple form. Then, the transfer functio n becomes a product of the ratio of two capacitors and the sensibility of the DC gain to each capacitor is close to unity. Consequently, a s imple test with partial diagnosis is realised with some DC voltage sti muli and gives an accurate test result at the output of the last volta ge amplifier.