A 90-MHZ 16-MB SYSTEM INTEGRATED MEMORY WITH DIRECT INTERFACE TO CPU

Citation
K. Dosaka et al., A 90-MHZ 16-MB SYSTEM INTEGRATED MEMORY WITH DIRECT INTERFACE TO CPU, IEEE journal of solid-state circuits, 31(4), 1996, pp. 537-545
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
31
Issue
4
Year of publication
1996
Pages
537 - 545
Database
ISI
SICI code
0018-9200(1996)31:4<537:A91SIM>2.0.ZU;2-B
Abstract
This paper describes a system integrated memory with direct interface to CPU which integrates an SRAM, a DRAM, and control circuitry, includ ing a tag memory (TAG). This memory realizes a computer system without glue chips, and thus enables a computer system which is low cost, low power, and compact size, but still with sufficient performance, And f ast clock cycle time and access time is realized using a newly propose d clock driver and internal signal generator, This memory is fabricate d with a quad-polysilicon double-metal 0.55-mu m CMOS process which is the same as used in a conventional 16-Mb DRAM, The chip size of 145.3 mm(2) is only a 12% increase over the conventional 16-Mb DRAM, The ma ximum operating frequency is 90-MHz and the operating current at cache -hit is 156-mA. This memory is suitable for various types of computer systems such as personal digital assistants (PDA's), personal computer systems, and embedded controller applications.