A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS

This paper describes two techniques for low-power single-end multiport SRAM's: a current direction sense circuit and a write bit-line swing central circuit, The sense circuit's input node is clamped at an inter mediate voltage level, and the circuit transforms current direction in to a logic value. It operates Four times Faster than a CMOS inverter, when driver sizes are equal, When it is applied to a single-end multip ort SRAM, access is accelerated 3.2 times faster than that with a CMOS inverter with no increase in power consumption, The write bit-line sw ing control circuit reduces the bit-line precharge level within the li mit of correct operation by using a memory cell replica, The control c ircuit reduces power consumption For bit-line driving and pseudoread c ell current by 40%.