IMPLEMENTATION ISSUES OF 2-DIMENSIONAL POLYNOMIAL MULTIPLIERS FOR SIGNAL-PROCESSING USING RESIDUE ARITHMETIC

The residue number system (RNS) has been considered a useful tool for digital signal processing (DSP) since it can support parallel, carry-f ree, high-speed arithmetic. The polynomial residue number system (PRNS ) enjoys all the RNS advantages and is capable of performing the usefu l DSP operation of polynomial multiplication in a totally parallel fas hion and with minimum multiplication count provided that an appropriat e modular arithmetic ring is chosen. However, the PRNS has one limitat ion: that is the size of the ring used for the arithmetic is proportio nal to the size of the polynomials to be multiplied. As a result, to m ultiply large polynomials in a fixed-size arithmetic ring, one must in volve two-dimensional PRNS techniques. We describe these two-dimension al PRNS techniques and offer array implementations of two-dimensional PRNS polynomial multipliers. The proposed arrays are modular and pipel inable, and thus suitable for VLSI implementations.