The paper describes Reed-Muller universal logic modules (RM-ULMs) and
their use for the implementation of logic functions given in Reed-Mull
er (RM) form. A programmed algorithm is presented for the synthesis an
d optimisation of RM-ULM networks. The level-by-level minimisation pro
cedure is based on the selection of control variables at different lev
els with the aim of maximising the number of discontinued branches and
hence minimising the number of modules required to implement a given
function. The algorithm is programmed in Fortran and can be used to re
alise fixed-polarity generalised Reed-Muller (GRM) expansions of any p
olarity and any number of variables.