FAIR TRANSITION SYSTEM SPECIFICATION - AN INTEGRATED APPROACH

In this paper, we discuss the two approaches to the type of formalism used to express specifications: logic-based approach and model-based a pproach. Temporal logic and state machine, representatives of formalis ms used in each approach, are compared. As a result of this comparison , we know that although temporal logics have many advantages, especial ly abstraction and flexibility of the specification process, they fail to directly characterize situations easily modeled by model-based for malisms, such as ''local'' properties of execution sequences. To copy with these drawbacks, we present a new kind of formalism: fair transit ion system specification (FTSS). This approach combines the best featu res of temporal logic and state machine methods and it is easy to unde rstand and use. A nontrivial example is used to illustrate our approac h and it shows that our FTSS approach is promising.