Pk. Jha et Nd. Dutt, HIGH-LEVEL LIBRARY MAPPING FOR ARITHMETIC COMPONENTS, IEEE transactions on very large scale integration (VLSI) systems, 4(2), 1996, pp. 157-169
We describe high-level library mapping (HLLM), a technique that permit
s reuse of complex RT-level databook components (specifically ALU's).
HLLM can be used to couple existing databook libraries, module generat
ors and custom-designed components with the output of architectural or
behavioral synthesis, In this paper, we define the problem of high-le
vel library mapping, present some algorithmic formulations for HLLM of
ALU's, and demonstrate the versatility of our approach on a variety o
f libraries, We also compare HLLM against the traditional mapping appr
oach using logic synthesis, Our experiments show that HLLM for ALU's o
utperforms logic-synthesis in area, delay, and runtime, indicating tha
t HLLM is a promising approach for reuse of datapath components in arc
hitectural design and high-level synthesis.