A NEW SELF-ROUTING PERMUTATION NETWORK

In this paper, a self-routing permutation network based on a binary ra dix sorting network has been proposed. It has O(log(2) n) propagation delay and O(n log(2) n) hardware complexity with bit-parallel input. T he hardware complexity can be reduced to O(n log n) with bit-serial in put. The binary radix sorting network is recursively constructed by lo g n stages of bit sorting networks. The bit sorting network is then co nstructed by a proposed self-routing reverse banyan network. It has O( log n) propagation delay and O(n log n)hardware complexity. The propos ed reverse banyan network has been fully verified by Verilog Hardware Description Language in logical level. The VLSI design of its switchin g elements is simple and regular.