A 1.2-GFLOPS NEURAL-NETWORK CHIP FOR HIGH-SPEED NEURAL-NETWORK SERVERS

This paper describes a digital neural network chip for high-speed neur al network servers. The chip employs single-instruction multiple-data stream (SIMD) architecture consisting of 12 floating-point processing units, a control unit, and a nonlinear function unit. At a 50 MHz cloc k frequency, the chip achieves a peak speed performance of 1.2 GFLOPS using 24-bit floating-point representation, Two schemes of expanding t he network size enable neural tasks requiring over 1 million synapses to be executed, The average speed performances of typical neural netwo rk models are also discussed.