FINITE-DIFFERENCE TIME-DOMAIN ANALYSIS OF FLIP-CHIP INTERCONNECTS WITH STAGGERED BUMPS

This paper presents finite-difference time-domain (FDTD) analysis of R ip chip interconnects. Transition between coplanar waveguides on the c hip and the mother board are investigated over a broad band of frequen cy by means of Fourier transform of the time-domain results. Objective s of the analysis include the evaluation of bump reflection and insert ion loss as well as the reconfiguration of the transition to improve p ackage performance. Novel designs have been developed and presented to reduce the effects of package discontinuities and asymmetry. Staggeri ng the bumpy has been found to reduce reflection and insertion loss ov er a broad band of frequency. A reduction in bump reflection of up to 8 dB per transition can be achieved bg staggering the ground and signa l connects. The degradation in package performance due to structure as ymmetry is also studied. The present designs have been also found to r educe the effects of hip-chip asymmetry on insertion and reflection lo sses.