A SELF ADJUSTMENT TECHNIQUE MINIMIZING CHANNEL TO CHANNEL VARIATIONS IN VLSI READOUT CHIPS

Modern VLSI readout chips for strip and pixel detectors contain many e lectronic channels which all should behave exactly alike in order to g ive the optimal performance. However, good matching is often very diff icult to achieve due to many design constraints. In this paper, a simp le concept for automatic adjustment of important VLSI circuit properti es simultaneously in all readout channels is presented. The tuning is performed by applying a test injection pulse and, if necessary, a refe rence signal to all cells simultaneously. A simple circuit in each cha nnel adjusts the control voltage on a storage capacitor until matching is optimal. An application of this concept in a self adjusting delay circuit is presented and other possible applications are discussed.