A FAST-SETTLING 3 V CMOS BUFFER AMPLIFIER

Authors
GRADINARIU I GONTRAND C
Citation
I. Gradinariu et C. Gontrand, A FAST-SETTLING 3 V CMOS BUFFER AMPLIFIER, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 43(6), 1996, pp. 433-437
Citations number
9
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE transactions on circuits and systems. 1, Fundamental theory andapplications → ACNP
ISSN journal
10577122
Volume
43
Issue
6
Year of publication
1996
Pages
433 - 437
Database
ISI
SICI code
1057-7122(1996)43:6<433:AF3VCB>2.0.ZU;2-G
Abstract
This paper presents a two-stage fast, power-efficient 3 V CMOS buffer amplifier with rail-to-rail input/output voltage ranges, Because-of it s constant g(m), class-AB input stage, the amplifier is free of slew-r ate limitation and its settling-time is quasi-independent on input ste p amplitude. The amplifier has 6 MHz unity-gain frequency, 1 mW power- consumption and settles to 1% accuracy within 180 ns on 100 pF load. A s the class-AB input stage operates at constant quiescent current over the input voltage range, CMRR exceeds 70 dB.