TEST STAND FOR THE SILICON VERTEX DETECTOR OF THE COLLIDER DETECTOR FACILITY

Citation
S. Zimmermann et al., TEST STAND FOR THE SILICON VERTEX DETECTOR OF THE COLLIDER DETECTOR FACILITY, IEEE transactions on nuclear science, 43(3), 1996, pp. 1170-1174
Citations number
7
Categorie Soggetti
Nuclear Sciences & Tecnology","Engineering, Eletrical & Electronic
ISSN journal
00189499
Volume
43
Issue
3
Year of publication
1996
Part
2
Pages
1170 - 1174
Database
ISI
SICI code
0018-9499(1996)43:3<1170:TSFTSV>2.0.ZU;2-B
Abstract
A test stand for the next generation of the Silicon Vertex Detector (S VX-II) of the Collider Detector Facility (CDF) at Fermilab has been de veloped. It is capable of performing cosmic ray, beam, and laser pulsi ng tests on silicon strip detectors using the new generation of SVX ch ips. The test stand is composed of a SGI workstation. a VME CPU the Si licon Test Acquisition and Readout (STAR) board, the Test Fiber Interf ace Board (TFIB), and the Test Port Card (TPC). The STAR mediates betw een external stimuli for the different tests and produces appropriate high level commands which are sent to the TFIB. The TFIB, in conjuncti on with the TPC, translates these commands into the correct logic leve ls to control the SVX chips. The four modes of operation of the SVX ch ips are configuration, data acquisition, digitization, and data readou t. The data read out from the SVX chips is transferred to the STAR. Th e STAR can then be accessed by the VME CPU and the SGI workstation for future analyses. The detailed description of this test stand will be given.