RECEIVER ASIC FOR TIMING, TRIGGER AND CONTROL DISTRIBUTION IN LHC EXPERIMENTS

An ASIC receiver has been developed for the optical timing, trigger an d control distribution system for LHC detectors. It is capable of reco vering the LHC reference clock and the first-level trigger decisions a nd making them available to the front-end electronics properly deskewe d in time. The timing receiver is also capable of recognising individu ally addressed commands to provide some slow control capability. Its m ain functions include postamplication of the signal received from a ph otodetector-preamplifier, automatic gain control, data/clock separatio n, demultiplexing of the trigger and data channels and programmable co arse/fine deskewing functions. The design has been mapped into a stand ard 1 mu m CMOS process with all the analogue and timing critical func tions implemented in full custom. The jitter measured on the recovered clock is less than 100 ps for input optical powers down to -25 dBm. T he time deskewing functions allow the commands and the first level tri gger accept signal to be phase shifted up to a maximum of sixteen cloc k cycles in steps of 0.1 ns.