DIFFERENTIAL CURRENT SWITCH LOGIC - A LOW-POWER DCVS LOGIC FAMILY

Differential current switch logic (DCSL), a new logic family for imple menting clocked CMOS circuits, has been developed. DCSL is in principl e a clocked differential cascode voltage switch logic circuit (DCVS). The circuit topology outlines a generic method for reducing internal n ode swings in clocked DCVS logic circuits, In comparison to other form s of clocked DCVS, DCSL achieves better performance both in terms of p ower and speed by restricting internal voltage swings in the NMOS tree . DCSL circuits are capable of implementing high complexity high fan-i n gates without compromising gate delay, Automatic lock-out of inputs on completion of evaluation is a novel feature of the circuit, Three f orms of DCSL circuits have been developed with varying benefits in spe ed and power. SPICE simulations of circuits designed using the 1.2 mu MOSIS SCMOS process indicate a factor of two improvement in speed and power over comparable DCVS gates for moderate tree heights.