Y. Watanabe et al., PERMISSIBLE FUNCTIONS FOR MULTIOUTPUT COMPONENTS IN COMBINATIONAL LOGIC OPTIMIZATION, IEEE transactions on computer-aided design of integrated circuits and systems, 15(7), 1996, pp. 732-744
This paper is concerned with logic optimization of multilevel combinat
ional logic circuits, In light of theoretical work of the past years,
where a circuit is modeled by a Boolean network in which each node imp
lements a single-output Boolean function, we address how a concurrent
optimization over multiple nodes or components can lead to further opt
imization compared to conventional minimization techniques, In particu
lar, we provide a procedure for computing maximally compatible sets of
permissible relations for multiple nodes, This is a generalization of
the classical notion of a compatible set of permissible functions for
a single node, where no method is known for correctly computing such
a maximal set, We provide a method for computing the set correctly for
the general case, Based on this, we develop and implement a procedure
for optimizing multiple nodes concurrently, The proposed procedure ha
s been implemented, and we present experimental results.