VALID CLOCK FREQUENCIES AND THEIR COMPUTATION IN WAVEPIPELINED CIRCUITS

It is known that wavepipelined circuits offer high performance, becaus e their maximum clock frequencies are limited only by the path delay d ifferences of the circuits, as opposed to the longest path delays, For proper operation, precision in clock frequency is essential. Using a new representation, Timed Boolean Functions, we derive analytical expr essions for valid clocking intervals in terms of topological, 2-vector , and single vector delays, both the longest and the shortest, These i ntervals take into account both circuit functionality and timing chara cteristics, thus eliminating the pessimism caused by long and short fa lse paths, and include effects of circuit parameters such as delay var iations, clock skews, and setup and hold times of flip flops, In addit ion, we show that these intervals subsume Gotten's lower bound on vali d clock period, Further, we study the problem of computing all exact v alid clocking intervals and its computational complexity by demonstrat ing discontinuity and nonmonotonicity of the harmonic number H (tau) ( the number of valid simultaneous data waves allowed) as a function of the clock period tau. Finally, we propose algorithms to compute the ex act valid intervals for a given set of harmonic numbers and demonstrat e performance enhancement of balanced circuits from ISCAS benchmarks w ith gate delay variations.