SPECIAL AND EMBEDDED MEMORY MACROCELLS FOR LOW-COST AND LOW-POWER IN MPEG ENVIRONMENT

Special memory and embedded memories used in a newly designed MPEG2 de coder LSI are described. Orthogonal memory, which has a functionality of parallel-to-serial transposition, is employed in a IDCT (Inverse Di screte Cosine Transform) block for small area and low-power. The ortho gonal memory realizes the special purpose with 50% of the area and the power compared with using flip-flop array. FIFO's and other dual-port memories are designed by using a single-port RAM operated twice in on e clock cycle to reduce cost. Flip-Flop cell is one of the important m emory elements in the MPEG environment, and is also improved for the l ow-cost optimizing functionality for video processing. The area and po wer of the fabricated MPEG2 decoder chip are reduced by 20% using thes e techniques. As for testability, direct test mode is implemented for small area. An instruction RAM is placed outside the pad area in paral lel to a normal instruction ROM and activated by Al-masterslice for ex tensive debugging and an early sampling. Other memory related techniqu es and the key features of the decoder LSI are also described.