FEATURES OF SOI DRAMS AND THEIR POTENTIAL FOR LOW-VOLTAGE AND OR GIGA-BIT SCALE DRAMS/

Citation
Y. Yamaguchi et al., FEATURES OF SOI DRAMS AND THEIR POTENTIAL FOR LOW-VOLTAGE AND OR GIGA-BIT SCALE DRAMS/, IEICE transactions on electronics, E79C(6), 1996, pp. 772-780
Citations number
17
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
09168524
Volume
E79C
Issue
6
Year of publication
1996
Pages
772 - 780
Database
ISI
SICI code
0916-8524(1996)E79C:6<772:FOSDAT>2.0.ZU;2-V
Abstract
SOI DRAM's are candidates for giga-bit scale DRAM's due to the inheren t features of SOI structure, and are also desired to be used as low-vo ltage memories which will be used in portable systems in the forthcomi ng multimedia era. However, some drawbacks are also anticipated owing to floating substrate effects. in this report, the advantages and prob lems concerning SOI DRAM's were reconsidered by evaluation of our test devices and also by analysis with device and circuit simulators for t heir future prospects. The following advantages of SOI DRAM's were ver ified. Low-voltage operation, active current reduction and speed gain were obtained by the reduced junction capacitance and the back-gate-bi as effect. Static refresh characteristics were improved due to the red uced junction area. Soft error immunity was improved greatly by the co mplete isolation of the active region when the body potential is fixed . The problems that need to be resolved are closely related to the flo ating substrate effect. The soft error immunity in a floating body con dition and the dynamic refresh characteristics were degraded by the in stability of the floating body potential. Process and device approache s such as the field-shield-body-fixing method as well as circuit appro aches like the BSG scheme are required to eliminate the floating subst rate effects. From these investigations it can be said that a low-volt age DRAM with a current design rule would be possible if we pay close attention to the floating-substrate-related issues by optimizing vario us process/device and circuit techniques. With further development of the technology to suppress the floating substrate effects, it will be possible to develop simple and low-cost giga-bit level SOI DRAM's whic h use the SOI's inherent features to the full.