A CROSSING CHARGE RECYCLE REFRESH SCHEME WITH A SEPARATED DRIVER SENSE-AMPLIFIER FOR GB DRAMS

Authors
NARITAKE I SUGIBAYASHI T UTSUGI S MUROTANI T
Citation
I. Naritake et al., A CROSSING CHARGE RECYCLE REFRESH SCHEME WITH A SEPARATED DRIVER SENSE-AMPLIFIER FOR GB DRAMS, IEICE transactions on electronics, E79C(6), 1996, pp. 787-791
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEICE transactions on electronics → ACNP
ISSN journal
09168524
Volume
E79C
Issue
6
Year of publication
1996
Pages
787 - 791
Database
ISI
SICI code
0916-8524(1996)E79C:6<787:ACCRRS>2.0.ZU;2-O
Abstract
A crossing charge recycle refresh (CCRR) scheme and a serial charge re cycle refresh (SCRR) scheme are proposed for the large capacity DRAMs with hierarchical bit-line architecture to reduce main bit-line chargi ng current. A separated driver sense-amplifier (SDSA) circuit is essen tial to realize this scheme because it features 11 times shorter charg e transfer period than that of conventional sense-amplifiers. These ci rcuits are applied to an experimental 1-Gb DRAM, which achieves reduct ion of main bit-line charging current to 37.5%.