MAPPING OF THE RESIDUAL VOLTAGE OF HALL DEVICES FABRICATED BY P+SI COIMPLANTATION ON GAAS WAFERS

Cross-shaped GaAs Hall devices have been fabricated by a completely pl anar technology using selective P+Si coimplantation steps to improve t he quality of the active implanted layer in semi-insulating GaAs. The basic technological processes are described. Selected measured charact eristics of these elements are determined by means of C-V, conductivit y, and Hall methods. The wafer maps of the residual voltage exhibit ev ident fourfold symmetry. These results may be explained by correlation between spatial variations of residual voltage and thermally induced fourfold symmetry for the dislocation distribution in the LEC GaAs waf ers.