WIRE SIZING AS A CONVEX-OPTIMIZATION PROBLEM - EXPLORING THE AREA-DELAY TRADEOFF

Authors
Citation
Ss. Sapatnekar, WIRE SIZING AS A CONVEX-OPTIMIZATION PROBLEM - EXPLORING THE AREA-DELAY TRADEOFF, IEEE transactions on computer-aided design of integrated circuits and systems, 15(8), 1996, pp. 1001-1011
Citations number
11
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Science Hardware & Architecture
ISSN journal
02780070
Volume
15
Issue
8
Year of publication
1996
Pages
1001 - 1011
Database
ISI
SICI code
0278-0070(1996)15:8<1001:WSAACP>2.0.ZU;2-Q
Abstract
An efficient solution to the wire sizing problem using the Elmore dela y model is proposed. Two formulations of the problem are put forth. In the first, the minimum interconnect delay is sought, while in the lat ter, we minimize the net delay under delay constraints at the leaf nod es; previous approaches solve only the former problem. Theoretical res ults on these problems are proved, and two algorithms are presented. O ne is a sensitivity-based heuristic, while the other is a rigorous con vex optimization problem. It is shown experimentally that the sensitiv ity-based heuristic gives near-optimal results with reasonable runtime s. A smooth area-delay tradeoff is shown, and results are presented to illustrate the fact that sizing for minimum delay is not a good engin eering goal. Instead, a delay goal of even 15% over the minimum provid es significantly better engineering solutions.