CLOCKED-SENSE-AMPLIFIER-BASED SMART-PIXEL OPTICAL RECEIVERS

We introduce the concept of synchronous smart-pixel optical receivers, and present the first use of a clocked-sense amplifier as a smart-pix el optical receiver, Such a receiver uses the controlled application o f positive feedback to obtain low-power compact digital amplification, We describe the design and simulation of two types of optical receive rs based on a clamped bit-line sense amplifier (CBLSA), and a conventi onal sense amplifier (CSA), Both of these circuits have been realized in 0.8 micron-linewidth foundry CMOS with hybrid-bonded GaAs-AlGaAs MQ W detectors and modulators attached to the circuit, Operation in exces s of 750 Mb/s is demonstrated, within a layout area of 44 mu m x 22 mu m, with a bias-dependent estimated power dissipation of 1 to 2 mW, Op eration with one or two input beams is possible, with approximate mini mum detected photocurrent levels at 320 Mb/s of 8 mu A (similar to 100 fJ) for single-beam operation and 2.5 mu A/beam (similar to 30 fJ/bea m) for two-beam operation, all in the CBLSA-based circuit.