A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS

Citation
M. Izumikawa et M. Yamashina, A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS, IEICE transactions on electronics, E79C(7), 1996, pp. 957-962
Citations number
4
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
09168524
Volume
E79C
Issue
7
Year of publication
1996
Pages
957 - 962
Database
ISI
SICI code
0916-8524(1996)E79C:7<957:ACDSTF>2.0.ZU;2-Q
Abstract
This paper describes two techniques for low-power single-end multiport SRAM's: a current direction sense circuit and a write bit-line swing control circuit, The sense circuit's input node is clamped at an inter mediate voltage level, and the circuit transforms current direction in to a logic value. It operates four times faster than a CMOS inverter, when driver sizes are equal, When it is applied to a single-end multip ort SRAM, access is accelerated 3.2 times faster than that with a CMOS inverter with no increase in power consumption, The write bit-line sw ing control circuit reduces the bit-line precharge level within the li mit of correct operation by using a memory cell replica, The control c ircuit reduces power consumption for bit-line driving and pseudoread c ell current by 40%.