MISMATCH MODELING AND CHARACTERIZATION OF BIPOLAR-TRANSISTORS FOR STATISTICAL CAD

A simple test structure and an extraction methodology are presented to study the parameter mismatch variance for vertical npn bipolar transi stors, Guidelines for precise and repeatable measurement are discussed . The importance of simultaneous measurement of parameter mismatch is also shown, Mismatch measurements made on 192 BJT pairs fabricated at Orbit, in their 2 mu m nwell CMOS process, are used to develop a BJT m ismatch variance model and to predict the collector current mismatch d eviation of the same population of BJT's, Comparisons are made with th e measured collector current mismatch.