EFFECTS AND MODELING OF SIMULTANEOUS SWITCHING NOISE FOR BICMOS OFF-CHIP DRIVERS

A model of simultaneous switching noise (SSN) for the conventional BiC MOS driver including the influence of negative feedback is presented, Level 1 SPICE-type MOSFET and Gummel-Poon BJT device models are used f or the analysis, The model accounts for a reduction in forward current gain, beta(F), that is attributed to high-level injection effects, Cl osed-form expressions are presented that predict the maximum SSN encou ntered in low-level and high-level injection, Solutions of the first e quation are combined with the second in order to model the complete SS N transient, Model predictions are compared to SPICE simulation result s for 5 V, 1 mu m drivers and 3.5 V, 0.5 mu m drivers with close agree ment. The effects of BJT parasitic resistance, junction capacitance, a nd forward transit time on reducing induced ground noise are also expl ored, With the introduction of these parasitics, SPICE predictions of the maximum SSN are approximately 20% lower than closed-form model res ults. Immunity of the quiet BiCMOS driver to noise present at the grou nd and power connections is also investigated, It is found that the qu iet driver is highly immune to adverse effects caused by SSN at the po wer connection and partially immune to SSN present at the ground, Coup ling between ground noise and the output occurs when the ground noise is greater than two forward diode drops above ground, in which case th e output tracks the ground noise with a negative offset of one diode d rop.