DESIGN TRADE-OFFS FOR THE LAST STAGE OF AN UNREGULATED, LONG-CHANNEL CMOS OFF-CHIP DRIVER WITH SIMULTANEOUS SWITCHING NOISE AND SWITCHING TIME CONSIDERATIONS

Design trade-off relations for the last stage of a complementary metal -oxide-semiconductor (CMOS) off-chip driver that meets a prespecified normalized maximum simultaneous switching ground noise add a prespecif ied normalized time when the switched N-channel metal-oxide-semiconduc tor transistor (NMOST) leaves the saturation region are provided in th is paper, To maintain system performance with control of 90-10% fall t ime and/or 10-90% rise time, the proposed trade-off relations are then modified numerically for design with prespecified fall/rise time. The proposed trade-offs relate the normalized simultaneous switching nois e and the normalized switching time to driver size, load capacitance, ground/power path inductance, number of switching drivers, and input s ignal rise time, It will be shown that a dimensionless analysis method allows design to be extended to a variety of systems that share the s ame dimensionless performance, Such a feature will be demonstrated by SPICE simulations of circuits based upon the proposed design relations and MOS1 model, which agrees well with the design goals.