SELECTIVE EPITAXIAL SI BASED LAYERS AND TISI2 DEPOSITION BY INTEGRATED CHEMICAL-VAPOR-DEPOSITION

High performance IC manufacturing requirements, such as large diameter wafer uniformity, reproducibility, throughput and reliability can be fulfilled by commercial integrated processing, single wafer cluster to ols, This paper presents results obtained on an industrial cluster rea ctor for 200 mm wafers by combining epitaxial silicon related material s and selective deposition of TiSi2. Low temperature epitaxial Si and SiGe alloys are studied for buried thin layers used in CMOS and HBT de vices. The doping profile abruptness for B and P are within SIMS resol ution limits. The TiSi2/Si selective deposition is also investigated, sequentially and in situ, as a technique for future salicided S/D with a reduction in technological steps and interface contamination. Stati stical electrical results obtained using 0.35 and 0.25 mu m CMOS techn ologies in which the CVD silicide deposition is tested, are presented and compared with the standard salicide technique.